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 HD-LINX TM GS1508
HDTV Cable Driver
PRELIMINARY DATA SHEET FEATURES * SMPTE 292M compliant * dual cable driving outputs optimized for driving data up to 1.485Gb/s * 7% tolerance output * >17dB output return loss * minimum external components * seamless interface with the HD-LINXTM family of products * low power * standard packaging APPLICATIONS 1.485Gb/s HDTV Serial Digital Receiver Interfaces for: Routers, Distribution Amplifiers, Switchers, and other transmitting equipment. DESCRIPTION The GS1508 is a first generation very high speed bipolar integrated circuit designed to drive two 75 co-axial cables. The GS1508 is a SMPTE 292M compliant cable driver that directly interfaces with other Gennum HDTV devices and can also be used as a general purpose high speed cable driver. The GS1508 features two complementary outputs whose amplitude is controlled within a precise 7% variation. The output amplitude can be varied by adjusting the RSET resistor value. The serial inputs can be AC coupled. The GS1508 is a low power device that does not require external pull down resistors. The GS1508 is packaged in an 8 pin SOIC and operates from a single 5V power supply. ORDERING INFORMATION
PART NUMBER GS1508-CKA GS1508-CTA PACKAGE 8 pin SOIC 8 pin Tape and Reel TEMPERATURE 0C to 70C 0C to 70C
GS1508
BANDGAP REFERENCE AND BIASING CIRCUIT
RSET
SDI SDI
INPUT DIFFERENTIAL PAIR
SDO OUTPUT STAGE & CONTROL SDO
PATENT PENDING
BLOCK DIAGRAM
Revision Date: March 2000 GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com www.gennum.com
Document No. 522 - 02 - 03
ABSOLUTE MAXIMUM RATINGS
TA = 25C unless otherwise indicated
PARAMETER Supply Voltage Input Voltage Range (any input) Operating Temperature Range
VALUE 5.5V -0.3 to (VCC +0.3)V 0C to 70C -65C to 150C 300mW 260C 2000V
GS1508
Storage Temperature Power Dissipation Lead Temperature (soldering, 10 sec) Input ESD Voltage
DC ELECTRICAL CHARACTERISTICS
VCC = 5V, TA = 0C to 70C unless otherwise shown. Specifications assume 800mV output amplitude level settings into end terminated 75 transmission lines. Data Rate = 1485Mb/s unless otherwise shown.
PARAMETER Supply Voltage System Power Consumption Supply Current Common Mode Input Voltage Range Common Mode Output Voltage Range
CONDITIONS
SYMBOL VCC
MIN 4.75 -
TYP 5.00 215
MAX 5.25 265
UNITS V mW
NOTES
TEST LEVEL 1 1
Driving two 75 cables
PD
IS VCM,IN VCM,OUT
2.5+(VDIFF/2) -
43 -
54 VCC-(VDIFF/2) -
mA V
1 2
VCC-VOUT
V
2
AC ELECTRICAL CHARACTERISTICS
VCC = 5V, TA = 0C to 70C unless otherwise shown. Specifications assume 800mV output amplitude levels into end terminated 75 transmission lines. Data Rate = 1485Mb/s unless otherwise shown.
PARAMETER Serial Digital Rate Additive Jitter Differential Input Differential Output Output Rise/Fall Times Mismatch in Output Rise/Fall Times Overshoot Duty Cycle Distortion Output Return Loss NOTES:
CONDITIONS
SYMBOL
MIN DC
TYP 1485 5 800 120 15
MAX 800 850 250 30
UNITS Mb/s psRMS mV mV ps ps
NOTES
TEST LEVEL 1
1485Mb/s VDIFF VOUT (20% - 80%) tR, tF
150 750 -
1 diff p-p p-p 2
3 2 1 1 4
5MHz to 1485MHz -
1 15 17
8 30 -
% ps dB 2
4 1 4
TEST LEVELS:
23
1. RMS additive jitter measured using Pseudo Random bit sequence (2 2. Measured with Gennum Evaluation Board (EB1508).
- 1).
1. 100% tested at 25C. 2. Guaranteed by design. 3. Correlated Value. 4. Tested with EB1508
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PIN CONNECTIONS
SDI SDI VEE RSET 1 2 3 4 8 7 6 5 SDO SDO GND
GS1508 TOP VIEW
GS1508
VCC
PIN DESCRIPTIONS
NUMBER 1, 2 3 4 5 6 7, 8 SYMBOL SDI, SDI VEE RSET VCC GND SDO, SDO TYPE I P I P P O DESCRIPTION Serial data inputs (non-inverting and inverting). Most negative supply voltage. Output amplitude control resistor. Most positive supply voltage. Not connected internally. Connect to Ground. Used for isolation. Serial data outputs (non-inverting and inverting).
INPUT / OUTPUT CIRCUITS
VCC
5k SDO SDO SDI SDI
20k
+ RSET
Fig. 1 (Pins 1 and 2)
Fig. 2 (Pins 7 and 8)
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DETAILED DESCRIPTION
INPUT INTERFACING
SDI/SDI are high impedance differential inputs. (See Figure 1 for equivalent input circuit). Several conditions must be observed when interfacing to these inputs:
GS1508
1. The differential input signal amplitude must be between 150 and 800mVpp. 2. The common mode voltage range must be as specified in the DC Characteristics table. For a 400mV input from the GS1504 HD cable equalizer, this corresponds to a common mode voltage range of between 2.7 and 4.8 volts. 3. For input trace lengths longer than approximately 1cm, the inputs should be terminated as shown in the Typical Application Circuit. The GS1508 inputs are self biased, allowing for simple AC coupling to the device. For serial digital HDTV, a minimum capacitor value of 4.7F should be used to allow coupling of pathological test signals. A tantalum capacitor is recommended.
OUTPUT INTERFACING
Fig. 3 Output Optimized for Waveform Symmetry L=8.2nH, R=75 (Typical ORL=13.5dB)
The GS1508 outputs are current mode, and will drive 800mV into a 75 ohm load. These outputs are protected from accidental static damage with internal static protection diodes. The SMPTE 292M standard requires that the output of a cable driver have a source impedance of 75 and a return loss of at least 15dB between 5Mhz and 1.485GHz. In order for an HD SDI output circuit using the GS1508 to meet this specification, the output circuit shown in the Typical Application Circuit is recommended. The values of LCOMP and CCOMP will vary depending on PCB layout, but typical values are 12nH and 0.5pF respectively. The small value of CCOMP can be easily swamped by parasitic PCB capacitance, so it is recommended that the ground plane be removed under the GS1508 output circuitry (see the Application Information section in this data sheet for further details). A 4.7F capacitor is used for AC coupling the output of the GS1508. This value is chosen to ensure that pathological signals can be coupled without a significant DC component occurring.
Fig. 4 Output Optimized for Return Loss L=12nH, C=0.5pF, R=75 (Typical ORL=18dB)
Figures 3 and 4 show the eye diagram of the GS1508 output for two different output compensation conditions. Figure 4 shows the GS1508 output optimized for wideband return loss of 18dB. Figure 3 shows the GS1508 output optimized for output waveform symmetry. In this case the output may not exhibit a return loss of 15dB. When measuring return loss at the GS1508 output it is necessary to take the measurement for both a logic high and a logic low output condition. This is because the output protection diodes act as a varactor (voltage controlled capacitor) as shown in Figure 5. Consequently, the output capacitance of the GS1508 is dependent on the logic state of the output.
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GS1508
1.000
SDO OUTPUT SWING
0.800
0.600
SDO
0.400
GS1508
0.200
Fig. 5 Static Protection Diodes OUTPUT RETURN LOSS MEASUREMENT
0.000 0.0000
0.0050
0.0100
0.0150
0.0200
0.0250
1 / RSET (mho)
To perform a practical return loss measurement, it is necessary to force the GS1508 output to a DC high or low condition. The actual measured return loss will be based on the outputs being static at VCC or VCC-1.6V. Under normal operating conditions the outputs of the GS1508 swing between VCC-0.4V and VCC-1.2V, so the measured value of return loss will not represent the actual operating return loss. A simple method of calculating the values of actual operating return loss is to interpolate the two return loss measurements. In this way, the values of return loss are estimated at VCC-0.4V and VCC-1.2V based on the measurements at VCC and VCC-1.6V. The two values of return loss (high and low) will typically differ by several decibels. If the measured return loss is RH for logic high and RL for logic low, then the two values can be interpolated as follows: RIH = RH- (RH-RL)/4 and RIL = RL+(RH-RL)/4 where RIH is the interpolated logic high value and RIL is the interpolated logic low value. For example, if RH = -18dB and RL = -14dB, then the interpolated values are RIH = -17dB and RIL = -15dB.
OUTPUT AMPLITUDE ADJUSTMENT
Fig. 6 GS1508 Output Amplitude vs. 1/R SET TABLE 1: RSET vs VOUT RSET R 500.0 150.0 75.0 53.6 43.2 1/RSET 0.0020 0.0067 0.0133 0.0187 0.0231 OUTPUT SWING 0.095 0.298 0.575 0.785 0.937
NOTE: For reliable operation of the GS1508 over the full temperature range, do not use an RSET value below 49.9.
The output amplitude of the GS1508 can be adjusted by changing the value of the RSET resistor as shown in Figure 6 and Table 1. For an 800mVp-p output with a nominal 7% tolerance, a value of 53.6% is required. A 1% SMT resistor should be used. The RSET resistor is part of the high speed output circuit of the GS1508. The resistor should be placed as close as possible to the RSET pin. In addition, PCB capacitance should be minimized at this node by removing the PCB groundplane beneath the RSET resistor and the RSET pin.
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TYPICAL APPLICATION CIRCUIT
VCC 100n 75 75 CCOMP LCOMP 75 47 + 7 SDI 3 Z0 Z0 4 RSET 1n 53.6 01
All resistors in ohms, all capacitors in farads, unless otherwise shown.
PECL INPUT
1 SDI 2 SDO SDO GS1508 VEE GND
8
OUT
GS1508
75 6 5 VCC LCOMP CCOMP + 47 OUT
VCC
TABLE 2: Typical Application Circuit Component Values COMPONENT RSET Z0 LCOMP CCOMP VALUE 53.6 50 12nH 0.5pF For 800mV Output For 50 PCB trace impedance Typical value. Component value will vary depending on PCB layout. Typical value. Component value will vary depending on PCB layout. COMMENT
APPLICATION INFORMATION
PCB LAYOUT
Special attention must be paid to component layout when designing serial digital interfaces for HDTV. Figures 8 through 11 show the artwork for a four layer printed circuit evaluation board for the GS1508. The schematic is shown in Figure 7. An FR-4 dielectric can be used, however, controlled impedance transmission lines are required for PCB traces longer than approximately 1cm. Note the following PCB artwork features used to optimize performance: PCB trace width for HD rate signals is closely matched to SMT component width to minimize reflections due to change in trace impedance The PCB ground plane is removed under the GS1508 output components to minimize parasitic capacitance. The PCB ground plane is removed under the GS1508 RSET pin and resistor to minimize parasitic capacitance Input and output BNC connectors are surface mounted inline to eliminate a transmission line stub caused by a BNC mounting via High speed traces are curved to minimize impedance changes due to change of PCB trace width.
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GS1508 EVALUATION BOARD
VCC TP1 C1 1 C2 100n C3 1n TP2
GS1508
VCC C16 1n R13 50 R8 75 U2
SDI SDO SDI SDO VEE GND RSET VCC
R12 50 C14 J7 1 EDGEMNT_BNC C13 J6 EDGEMNT_BNC 1 R11 53.6 All resistors in ohms, all capacitors in farads, unless otherwise shown.
C10 100n R7 75
L2 10n R9 75 C17 0p5 L3 10n C11 J4 47 C12 J5 R10 75 C18 0p5 47 EDGEMNT_BNC EDGEMNT_BNC
C15 10n
VCC
Fig. 7 Schematic Diagram for the GS1508 Evaluation Board
Fig. 8 Top Layer of EB1508 PCB Layout
Fig. 10 Ground Layer of EB1508 PCB Layout
Fig. 9 Power Layer of EB1508 PCB Layout
Fig. 11 Bottom Layer of EB1508 PCB Layout
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PACKAGE DIMENSIONS
5.00 MAX. 0.49 MAX 1.91 MAX
1.27 MAX
8
5 4.0 MAX 6.20 MAX 0.25 MAX
GS1508
1
4 0.25 MAX = = =
0.60 MAX 3.81 0.05 3 spaces @ 1.27 0.05
8-pin SOIC All dimensions are in millimetres
CAUTION
ELECTROSTATIC SENSITIVE DEVICES
DO NOT OPEN PACKAGES OR HANDLE EXCEPT AT A STATIC-FREE WORKSTATION
DOCUMENT IDENTIFICATION
PRELIMINARY DATA SHEET This product is in production. Gennum reserves the right to make changes to the product and to the documentation.
REVISION NOTES:
Updated ordering information; Replaced evaluation board diagrams; Updated pin descriptions; Added note to Table 1.
For the latest product information, visit www.gennum.com
GENNUM CORPORATION
MAILING ADDRESS: P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 SHIPPING ADDRESS: 970 Fraser Drive, Burlington, Ontario, Canada L7L 5P5
GENNUM JAPAN CORPORATION C-101, Miyamae Village, 2-10-42 Miyamae, Suginami-ku Tokyo 168-0081, Japan Tel. +81 (03) 3334-7700 Fax. +81 (03) 3247-8839 GENNUM UK LIMITED 25 Long Garden Walk, Farnham, Surrey, England GU9 7HX Tel. +44 (0)1252 747 000 Fax +44 (0)1252 726 523
Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. (c) Copyright August 1998 Gennum Corporation. All rights reserved. Printed in Canada.
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